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rte_ethdev.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
3 */
4
5#ifndef _RTE_ETHDEV_H_
6#define _RTE_ETHDEV_H_
7
148#ifdef __cplusplus
149extern "C" {
150#endif
151
152#include <stdint.h>
153
154/* Use this macro to check if LRO API is supported */
155#define RTE_ETHDEV_HAS_LRO_SUPPORT
156
157/* Alias RTE_LIBRTE_ETHDEV_DEBUG for backward compatibility. */
158#ifdef RTE_LIBRTE_ETHDEV_DEBUG
159#define RTE_ETHDEV_DEBUG_RX
160#define RTE_ETHDEV_DEBUG_TX
161#endif
162
163#include <rte_cman.h>
164#include <rte_compat.h>
165#include <rte_log.h>
166#include <rte_interrupts.h>
167#include <rte_dev.h>
168#include <rte_devargs.h>
169#include <rte_bitops.h>
170#include <rte_errno.h>
171#include <rte_common.h>
172#include <rte_config.h>
173#include <rte_power_intrinsics.h>
174
175#include "rte_ethdev_trace_fp.h"
176#include "rte_dev_info.h"
177
178extern int rte_eth_dev_logtype;
179
180#define RTE_ETHDEV_LOG(level, ...) \
181 rte_log(RTE_LOG_ ## level, rte_eth_dev_logtype, "" __VA_ARGS__)
182
183struct rte_mbuf;
184
201int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs);
202
218
232
246#define RTE_ETH_FOREACH_MATCHING_DEV(id, devargs, iter) \
247 for (rte_eth_iterator_init(iter, devargs), \
248 id = rte_eth_iterator_next(iter); \
249 id != RTE_MAX_ETHPORTS; \
250 id = rte_eth_iterator_next(iter))
251
262 uint64_t ipackets;
263 uint64_t opackets;
264 uint64_t ibytes;
265 uint64_t obytes;
270 uint64_t imissed;
271 uint64_t ierrors;
272 uint64_t oerrors;
273 uint64_t rx_nombuf;
274 /* Queue stats are limited to max 256 queues */
276 uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
278 uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
280 uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
282 uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
284 uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS];
285};
286
290#define RTE_ETH_LINK_SPEED_AUTONEG 0
291#define RTE_ETH_LINK_SPEED_FIXED RTE_BIT32(0)
292#define RTE_ETH_LINK_SPEED_10M_HD RTE_BIT32(1)
293#define RTE_ETH_LINK_SPEED_10M RTE_BIT32(2)
294#define RTE_ETH_LINK_SPEED_100M_HD RTE_BIT32(3)
295#define RTE_ETH_LINK_SPEED_100M RTE_BIT32(4)
296#define RTE_ETH_LINK_SPEED_1G RTE_BIT32(5)
297#define RTE_ETH_LINK_SPEED_2_5G RTE_BIT32(6)
298#define RTE_ETH_LINK_SPEED_5G RTE_BIT32(7)
299#define RTE_ETH_LINK_SPEED_10G RTE_BIT32(8)
300#define RTE_ETH_LINK_SPEED_20G RTE_BIT32(9)
301#define RTE_ETH_LINK_SPEED_25G RTE_BIT32(10)
302#define RTE_ETH_LINK_SPEED_40G RTE_BIT32(11)
303#define RTE_ETH_LINK_SPEED_50G RTE_BIT32(12)
304#define RTE_ETH_LINK_SPEED_56G RTE_BIT32(13)
305#define RTE_ETH_LINK_SPEED_100G RTE_BIT32(14)
306#define RTE_ETH_LINK_SPEED_200G RTE_BIT32(15)
307#define RTE_ETH_LINK_SPEED_400G RTE_BIT32(16)
313#define RTE_ETH_SPEED_NUM_NONE 0
314#define RTE_ETH_SPEED_NUM_10M 10
315#define RTE_ETH_SPEED_NUM_100M 100
316#define RTE_ETH_SPEED_NUM_1G 1000
317#define RTE_ETH_SPEED_NUM_2_5G 2500
318#define RTE_ETH_SPEED_NUM_5G 5000
319#define RTE_ETH_SPEED_NUM_10G 10000
320#define RTE_ETH_SPEED_NUM_20G 20000
321#define RTE_ETH_SPEED_NUM_25G 25000
322#define RTE_ETH_SPEED_NUM_40G 40000
323#define RTE_ETH_SPEED_NUM_50G 50000
324#define RTE_ETH_SPEED_NUM_56G 56000
325#define RTE_ETH_SPEED_NUM_100G 100000
326#define RTE_ETH_SPEED_NUM_200G 200000
327#define RTE_ETH_SPEED_NUM_400G 400000
328#define RTE_ETH_SPEED_NUM_UNKNOWN UINT32_MAX
334__extension__
336 uint32_t link_speed;
337 uint16_t link_duplex : 1;
338 uint16_t link_autoneg : 1;
339 uint16_t link_status : 1;
340} __rte_aligned(8);
345#define RTE_ETH_LINK_HALF_DUPLEX 0
346#define RTE_ETH_LINK_FULL_DUPLEX 1
347#define RTE_ETH_LINK_DOWN 0
348#define RTE_ETH_LINK_UP 1
349#define RTE_ETH_LINK_FIXED 0
350#define RTE_ETH_LINK_AUTONEG 1
351#define RTE_ETH_LINK_MAX_STR_LEN 40
359 uint8_t pthresh;
360 uint8_t hthresh;
361 uint8_t wthresh;
362};
363
367#define RTE_ETH_MQ_RX_RSS_FLAG RTE_BIT32(0)
368#define RTE_ETH_MQ_RX_DCB_FLAG RTE_BIT32(1)
369#define RTE_ETH_MQ_RX_VMDQ_FLAG RTE_BIT32(2)
397
408
415 uint32_t mtu;
423 uint64_t offloads;
424
425 uint64_t reserved_64s[2];
426 void *reserved_ptrs[2];
427};
428
434 RTE_ETH_VLAN_TYPE_UNKNOWN = 0,
437 RTE_ETH_VLAN_TYPE_MAX,
438};
439
445 uint64_t ids[64];
446};
447
471
472#define RTE_ETH_HASH_ALGO_TO_CAPA(x) RTE_BIT32(x)
473#define RTE_ETH_HASH_ALGO_CAPA_MASK(x) RTE_BIT32(RTE_ETH_HASH_FUNCTION_ ## x)
474
501
502/*
503 * A packet can be identified by hardware as different flow types. Different
504 * NIC hardware may support different flow types.
505 * Basically, the NIC hardware identifies the flow type as deep protocol as
506 * possible, and exclusively. For example, if a packet is identified as
507 * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
508 * though it is an actual IPV4 packet.
509 */
510#define RTE_ETH_FLOW_UNKNOWN 0
511#define RTE_ETH_FLOW_RAW 1
512#define RTE_ETH_FLOW_IPV4 2
513#define RTE_ETH_FLOW_FRAG_IPV4 3
514#define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4
515#define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5
516#define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6
517#define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7
518#define RTE_ETH_FLOW_IPV6 8
519#define RTE_ETH_FLOW_FRAG_IPV6 9
520#define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10
521#define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11
522#define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12
523#define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
524#define RTE_ETH_FLOW_L2_PAYLOAD 14
525#define RTE_ETH_FLOW_IPV6_EX 15
526#define RTE_ETH_FLOW_IPV6_TCP_EX 16
527#define RTE_ETH_FLOW_IPV6_UDP_EX 17
529#define RTE_ETH_FLOW_PORT 18
530#define RTE_ETH_FLOW_VXLAN 19
531#define RTE_ETH_FLOW_GENEVE 20
532#define RTE_ETH_FLOW_NVGRE 21
533#define RTE_ETH_FLOW_VXLAN_GPE 22
534#define RTE_ETH_FLOW_GTPU 23
535#define RTE_ETH_FLOW_MAX 24
536
537/*
538 * Below macros are defined for RSS offload types, they can be used to
539 * fill rte_eth_rss_conf.rss_hf or rte_flow_action_rss.types.
540 */
541#define RTE_ETH_RSS_IPV4 RTE_BIT64(2)
542#define RTE_ETH_RSS_FRAG_IPV4 RTE_BIT64(3)
543#define RTE_ETH_RSS_NONFRAG_IPV4_TCP RTE_BIT64(4)
544#define RTE_ETH_RSS_NONFRAG_IPV4_UDP RTE_BIT64(5)
545#define RTE_ETH_RSS_NONFRAG_IPV4_SCTP RTE_BIT64(6)
546#define RTE_ETH_RSS_NONFRAG_IPV4_OTHER RTE_BIT64(7)
547#define RTE_ETH_RSS_IPV6 RTE_BIT64(8)
548#define RTE_ETH_RSS_FRAG_IPV6 RTE_BIT64(9)
549#define RTE_ETH_RSS_NONFRAG_IPV6_TCP RTE_BIT64(10)
550#define RTE_ETH_RSS_NONFRAG_IPV6_UDP RTE_BIT64(11)
551#define RTE_ETH_RSS_NONFRAG_IPV6_SCTP RTE_BIT64(12)
552#define RTE_ETH_RSS_NONFRAG_IPV6_OTHER RTE_BIT64(13)
553#define RTE_ETH_RSS_L2_PAYLOAD RTE_BIT64(14)
554#define RTE_ETH_RSS_IPV6_EX RTE_BIT64(15)
555#define RTE_ETH_RSS_IPV6_TCP_EX RTE_BIT64(16)
556#define RTE_ETH_RSS_IPV6_UDP_EX RTE_BIT64(17)
557#define RTE_ETH_RSS_PORT RTE_BIT64(18)
558#define RTE_ETH_RSS_VXLAN RTE_BIT64(19)
559#define RTE_ETH_RSS_GENEVE RTE_BIT64(20)
560#define RTE_ETH_RSS_NVGRE RTE_BIT64(21)
561#define RTE_ETH_RSS_GTPU RTE_BIT64(23)
562#define RTE_ETH_RSS_ETH RTE_BIT64(24)
563#define RTE_ETH_RSS_S_VLAN RTE_BIT64(25)
564#define RTE_ETH_RSS_C_VLAN RTE_BIT64(26)
565#define RTE_ETH_RSS_ESP RTE_BIT64(27)
566#define RTE_ETH_RSS_AH RTE_BIT64(28)
567#define RTE_ETH_RSS_L2TPV3 RTE_BIT64(29)
568#define RTE_ETH_RSS_PFCP RTE_BIT64(30)
569#define RTE_ETH_RSS_PPPOE RTE_BIT64(31)
570#define RTE_ETH_RSS_ECPRI RTE_BIT64(32)
571#define RTE_ETH_RSS_MPLS RTE_BIT64(33)
572#define RTE_ETH_RSS_IPV4_CHKSUM RTE_BIT64(34)
573
586#define RTE_ETH_RSS_L4_CHKSUM RTE_BIT64(35)
587
588#define RTE_ETH_RSS_L2TPV2 RTE_BIT64(36)
589
590/*
591 * We use the following macros to combine with above RTE_ETH_RSS_* for
592 * more specific input set selection. These bits are defined starting
593 * from the high end of the 64 bits.
594 * Note: If we use above RTE_ETH_RSS_* without SRC/DST_ONLY, it represents
595 * both SRC and DST are taken into account. If SRC_ONLY and DST_ONLY of
596 * the same level are used simultaneously, it is the same case as none of
597 * them are added.
598 */
599#define RTE_ETH_RSS_L3_SRC_ONLY RTE_BIT64(63)
600#define RTE_ETH_RSS_L3_DST_ONLY RTE_BIT64(62)
601#define RTE_ETH_RSS_L4_SRC_ONLY RTE_BIT64(61)
602#define RTE_ETH_RSS_L4_DST_ONLY RTE_BIT64(60)
603#define RTE_ETH_RSS_L2_SRC_ONLY RTE_BIT64(59)
604#define RTE_ETH_RSS_L2_DST_ONLY RTE_BIT64(58)
605
606/*
607 * Only select IPV6 address prefix as RSS input set according to
608 * https://tools.ietf.org/html/rfc6052
609 * Must be combined with RTE_ETH_RSS_IPV6, RTE_ETH_RSS_NONFRAG_IPV6_UDP,
610 * RTE_ETH_RSS_NONFRAG_IPV6_TCP, RTE_ETH_RSS_NONFRAG_IPV6_SCTP.
611 */
612#define RTE_ETH_RSS_L3_PRE32 RTE_BIT64(57)
613#define RTE_ETH_RSS_L3_PRE40 RTE_BIT64(56)
614#define RTE_ETH_RSS_L3_PRE48 RTE_BIT64(55)
615#define RTE_ETH_RSS_L3_PRE56 RTE_BIT64(54)
616#define RTE_ETH_RSS_L3_PRE64 RTE_BIT64(53)
617#define RTE_ETH_RSS_L3_PRE96 RTE_BIT64(52)
618
619/*
620 * Use the following macros to combine with the above layers
621 * to choose inner and outer layers or both for RSS computation.
622 * Bits 50 and 51 are reserved for this.
623 */
624
632#define RTE_ETH_RSS_LEVEL_PMD_DEFAULT (UINT64_C(0) << 50)
633
638#define RTE_ETH_RSS_LEVEL_OUTERMOST (UINT64_C(1) << 50)
639
644#define RTE_ETH_RSS_LEVEL_INNERMOST (UINT64_C(2) << 50)
645#define RTE_ETH_RSS_LEVEL_MASK (UINT64_C(3) << 50)
646
647#define RTE_ETH_RSS_LEVEL(rss_hf) ((rss_hf & RTE_ETH_RSS_LEVEL_MASK) >> 50)
648
659static inline uint64_t
660rte_eth_rss_hf_refine(uint64_t rss_hf)
661{
662 if ((rss_hf & RTE_ETH_RSS_L3_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L3_DST_ONLY))
663 rss_hf &= ~(RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY);
664
665 if ((rss_hf & RTE_ETH_RSS_L4_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L4_DST_ONLY))
666 rss_hf &= ~(RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY);
667
668 return rss_hf;
669}
670
671#define RTE_ETH_RSS_IPV6_PRE32 ( \
672 RTE_ETH_RSS_IPV6 | \
673 RTE_ETH_RSS_L3_PRE32)
674
675#define RTE_ETH_RSS_IPV6_PRE40 ( \
676 RTE_ETH_RSS_IPV6 | \
677 RTE_ETH_RSS_L3_PRE40)
678
679#define RTE_ETH_RSS_IPV6_PRE48 ( \
680 RTE_ETH_RSS_IPV6 | \
681 RTE_ETH_RSS_L3_PRE48)
682
683#define RTE_ETH_RSS_IPV6_PRE56 ( \
684 RTE_ETH_RSS_IPV6 | \
685 RTE_ETH_RSS_L3_PRE56)
686
687#define RTE_ETH_RSS_IPV6_PRE64 ( \
688 RTE_ETH_RSS_IPV6 | \
689 RTE_ETH_RSS_L3_PRE64)
690
691#define RTE_ETH_RSS_IPV6_PRE96 ( \
692 RTE_ETH_RSS_IPV6 | \
693 RTE_ETH_RSS_L3_PRE96)
694
695#define RTE_ETH_RSS_IPV6_PRE32_UDP ( \
696 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
697 RTE_ETH_RSS_L3_PRE32)
698
699#define RTE_ETH_RSS_IPV6_PRE40_UDP ( \
700 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
701 RTE_ETH_RSS_L3_PRE40)
702
703#define RTE_ETH_RSS_IPV6_PRE48_UDP ( \
704 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
705 RTE_ETH_RSS_L3_PRE48)
706
707#define RTE_ETH_RSS_IPV6_PRE56_UDP ( \
708 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
709 RTE_ETH_RSS_L3_PRE56)
710
711#define RTE_ETH_RSS_IPV6_PRE64_UDP ( \
712 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
713 RTE_ETH_RSS_L3_PRE64)
714
715#define RTE_ETH_RSS_IPV6_PRE96_UDP ( \
716 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
717 RTE_ETH_RSS_L3_PRE96)
718
719#define RTE_ETH_RSS_IPV6_PRE32_TCP ( \
720 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
721 RTE_ETH_RSS_L3_PRE32)
722
723#define RTE_ETH_RSS_IPV6_PRE40_TCP ( \
724 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
725 RTE_ETH_RSS_L3_PRE40)
726
727#define RTE_ETH_RSS_IPV6_PRE48_TCP ( \
728 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
729 RTE_ETH_RSS_L3_PRE48)
730
731#define RTE_ETH_RSS_IPV6_PRE56_TCP ( \
732 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
733 RTE_ETH_RSS_L3_PRE56)
734
735#define RTE_ETH_RSS_IPV6_PRE64_TCP ( \
736 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
737 RTE_ETH_RSS_L3_PRE64)
738
739#define RTE_ETH_RSS_IPV6_PRE96_TCP ( \
740 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
741 RTE_ETH_RSS_L3_PRE96)
742
743#define RTE_ETH_RSS_IPV6_PRE32_SCTP ( \
744 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
745 RTE_ETH_RSS_L3_PRE32)
746
747#define RTE_ETH_RSS_IPV6_PRE40_SCTP ( \
748 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
749 RTE_ETH_RSS_L3_PRE40)
750
751#define RTE_ETH_RSS_IPV6_PRE48_SCTP ( \
752 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
753 RTE_ETH_RSS_L3_PRE48)
754
755#define RTE_ETH_RSS_IPV6_PRE56_SCTP ( \
756 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
757 RTE_ETH_RSS_L3_PRE56)
758
759#define RTE_ETH_RSS_IPV6_PRE64_SCTP ( \
760 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
761 RTE_ETH_RSS_L3_PRE64)
762
763#define RTE_ETH_RSS_IPV6_PRE96_SCTP ( \
764 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
765 RTE_ETH_RSS_L3_PRE96)
766
767#define RTE_ETH_RSS_IP ( \
768 RTE_ETH_RSS_IPV4 | \
769 RTE_ETH_RSS_FRAG_IPV4 | \
770 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
771 RTE_ETH_RSS_IPV6 | \
772 RTE_ETH_RSS_FRAG_IPV6 | \
773 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
774 RTE_ETH_RSS_IPV6_EX)
775
776#define RTE_ETH_RSS_UDP ( \
777 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
778 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
779 RTE_ETH_RSS_IPV6_UDP_EX)
780
781#define RTE_ETH_RSS_TCP ( \
782 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
783 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
784 RTE_ETH_RSS_IPV6_TCP_EX)
785
786#define RTE_ETH_RSS_SCTP ( \
787 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
788 RTE_ETH_RSS_NONFRAG_IPV6_SCTP)
789
790#define RTE_ETH_RSS_TUNNEL ( \
791 RTE_ETH_RSS_VXLAN | \
792 RTE_ETH_RSS_GENEVE | \
793 RTE_ETH_RSS_NVGRE)
794
795#define RTE_ETH_RSS_VLAN ( \
796 RTE_ETH_RSS_S_VLAN | \
797 RTE_ETH_RSS_C_VLAN)
798
800#define RTE_ETH_RSS_PROTO_MASK ( \
801 RTE_ETH_RSS_IPV4 | \
802 RTE_ETH_RSS_FRAG_IPV4 | \
803 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
804 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
805 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
806 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
807 RTE_ETH_RSS_IPV6 | \
808 RTE_ETH_RSS_FRAG_IPV6 | \
809 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
810 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
811 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
812 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
813 RTE_ETH_RSS_L2_PAYLOAD | \
814 RTE_ETH_RSS_IPV6_EX | \
815 RTE_ETH_RSS_IPV6_TCP_EX | \
816 RTE_ETH_RSS_IPV6_UDP_EX | \
817 RTE_ETH_RSS_PORT | \
818 RTE_ETH_RSS_VXLAN | \
819 RTE_ETH_RSS_GENEVE | \
820 RTE_ETH_RSS_NVGRE | \
821 RTE_ETH_RSS_MPLS)
822
823/*
824 * Definitions used for redirection table entry size.
825 * Some RSS RETA sizes may not be supported by some drivers, check the
826 * documentation or the description of relevant functions for more details.
827 */
828#define RTE_ETH_RSS_RETA_SIZE_64 64
829#define RTE_ETH_RSS_RETA_SIZE_128 128
830#define RTE_ETH_RSS_RETA_SIZE_256 256
831#define RTE_ETH_RSS_RETA_SIZE_512 512
832#define RTE_ETH_RETA_GROUP_SIZE 64
833
835#define RTE_ETH_VMDQ_MAX_VLAN_FILTERS 64
836#define RTE_ETH_DCB_NUM_USER_PRIORITIES 8
837#define RTE_ETH_VMDQ_DCB_NUM_QUEUES 128
838#define RTE_ETH_DCB_NUM_QUEUES 128
842#define RTE_ETH_DCB_PG_SUPPORT RTE_BIT32(0)
843#define RTE_ETH_DCB_PFC_SUPPORT RTE_BIT32(1)
847#define RTE_ETH_VLAN_STRIP_OFFLOAD 0x0001
848#define RTE_ETH_VLAN_FILTER_OFFLOAD 0x0002
849#define RTE_ETH_VLAN_EXTEND_OFFLOAD 0x0004
850#define RTE_ETH_QINQ_STRIP_OFFLOAD 0x0008
852#define RTE_ETH_VLAN_STRIP_MASK 0x0001
853#define RTE_ETH_VLAN_FILTER_MASK 0x0002
854#define RTE_ETH_VLAN_EXTEND_MASK 0x0004
855#define RTE_ETH_QINQ_STRIP_MASK 0x0008
856#define RTE_ETH_VLAN_ID_MAX 0x0FFF
859/* Definitions used for receive MAC address */
860#define RTE_ETH_NUM_RECEIVE_MAC_ADDR 128
862/* Definitions used for unicast hash */
863#define RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY 128
869#define RTE_ETH_VMDQ_ACCEPT_UNTAG RTE_BIT32(0)
871#define RTE_ETH_VMDQ_ACCEPT_HASH_MC RTE_BIT32(1)
873#define RTE_ETH_VMDQ_ACCEPT_HASH_UC RTE_BIT32(2)
875#define RTE_ETH_VMDQ_ACCEPT_BROADCAST RTE_BIT32(3)
877#define RTE_ETH_VMDQ_ACCEPT_MULTICAST RTE_BIT32(4)
888 uint64_t mask;
890 uint16_t reta[RTE_ETH_RETA_GROUP_SIZE];
891};
892
901
912
913/* This structure may be extended in future. */
914struct rte_eth_dcb_rx_conf {
915 enum rte_eth_nb_tcs nb_tcs;
917 uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
918};
919
920struct rte_eth_vmdq_dcb_tx_conf {
921 enum rte_eth_nb_pools nb_queue_pools;
923 uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
924};
925
926struct rte_eth_dcb_tx_conf {
927 enum rte_eth_nb_tcs nb_tcs;
929 uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES];
930};
931
932struct rte_eth_vmdq_tx_conf {
933 enum rte_eth_nb_pools nb_queue_pools;
934};
935
959
990
1001 uint64_t offloads;
1002
1003 uint16_t pvid;
1004 __extension__
1005 uint8_t
1011
1012 uint64_t reserved_64s[2];
1013 void *reserved_ptrs[2];
1014};
1015
1077 struct rte_mempool *mp;
1078 uint16_t length;
1079 uint16_t offset;
1091 uint32_t proto_hdr;
1092};
1093
1101 /* The settings for buffer split offload. */
1102 struct rte_eth_rxseg_split split;
1103 /* The other features settings should be added here. */
1104};
1105
1112 uint8_t rx_drop_en;
1114 uint16_t rx_nseg;
1121 uint16_t share_group;
1122 uint16_t share_qid;
1128 uint64_t offloads;
1137
1158 uint16_t rx_nmempool;
1160 uint64_t reserved_64s[2];
1161 void *reserved_ptrs[2];
1162};
1163
1184
1197
1202 uint32_t rte_memory:1;
1203
1204 uint32_t reserved:30;
1205};
1206
1224
1225#define RTE_ETH_MAX_HAIRPIN_PEERS 32
1226
1234 uint16_t port;
1235 uint16_t queue;
1236};
1237
1245 uint32_t peer_count:16;
1256 uint32_t tx_explicit:1;
1257
1269 uint32_t manual_bind:1;
1270
1283
1295 uint32_t use_rte_memory:1;
1296
1307 uint32_t force_memory:1;
1308
1309 uint32_t reserved:11;
1311 struct rte_eth_hairpin_peer peers[RTE_ETH_MAX_HAIRPIN_PEERS];
1312};
1313
1318 uint16_t nb_max;
1319 uint16_t nb_min;
1320 uint16_t nb_align;
1330 uint16_t nb_seg_max;
1331
1344};
1345
1355
1370
1380
1395
1416 struct {
1417 uint16_t tx_qid;
1421 uint8_t tc;
1422 } rx_pause; /* Valid when (mode == FC_RX_PAUSE || mode == FC_FULL) */
1423
1424 struct {
1425 uint16_t pause_time;
1426 uint16_t rx_qid;
1430 uint8_t tc;
1431 } tx_pause; /* Valid when (mode == FC_TX_PAUSE || mode == FC_FULL) */
1432};
1433
1439 RTE_ETH_TUNNEL_TYPE_NONE = 0,
1440 RTE_ETH_TUNNEL_TYPE_VXLAN,
1441 RTE_ETH_TUNNEL_TYPE_GENEVE,
1442 RTE_ETH_TUNNEL_TYPE_TEREDO,
1443 RTE_ETH_TUNNEL_TYPE_NVGRE,
1444 RTE_ETH_TUNNEL_TYPE_IP_IN_GRE,
1445 RTE_ETH_L2_TUNNEL_TYPE_E_TAG,
1446 RTE_ETH_TUNNEL_TYPE_VXLAN_GPE,
1447 RTE_ETH_TUNNEL_TYPE_ECPRI,
1448 RTE_ETH_TUNNEL_TYPE_MAX,
1449};
1450
1451/* Deprecated API file for rte_eth_dev_filter_* functions */
1452#include "rte_eth_ctrl.h"
1453
1464 uint16_t udp_port;
1465 uint8_t prot_type;
1466};
1467
1473 uint32_t lsc:1;
1475 uint32_t rxq:1;
1477 uint32_t rmv:1;
1478};
1479
1480#define rte_intr_conf rte_eth_intr_conf
1481
1488 uint32_t link_speeds;
1497 uint32_t lpbk_mode;
1502 struct {
1503 struct rte_eth_rss_conf rss_conf;
1505 struct rte_eth_vmdq_dcb_conf vmdq_dcb_conf;
1507 struct rte_eth_dcb_rx_conf dcb_rx_conf;
1509 struct rte_eth_vmdq_rx_conf vmdq_rx_conf;
1511 union {
1513 struct rte_eth_vmdq_dcb_tx_conf vmdq_dcb_tx_conf;
1515 struct rte_eth_dcb_tx_conf dcb_tx_conf;
1517 struct rte_eth_vmdq_tx_conf vmdq_tx_conf;
1523};
1524
1528#define RTE_ETH_RX_OFFLOAD_VLAN_STRIP RTE_BIT64(0)
1529#define RTE_ETH_RX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1530#define RTE_ETH_RX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1531#define RTE_ETH_RX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1532#define RTE_ETH_RX_OFFLOAD_TCP_LRO RTE_BIT64(4)
1533#define RTE_ETH_RX_OFFLOAD_QINQ_STRIP RTE_BIT64(5)
1534#define RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(6)
1535#define RTE_ETH_RX_OFFLOAD_MACSEC_STRIP RTE_BIT64(7)
1536#define RTE_ETH_RX_OFFLOAD_VLAN_FILTER RTE_BIT64(9)
1537#define RTE_ETH_RX_OFFLOAD_VLAN_EXTEND RTE_BIT64(10)
1538#define RTE_ETH_RX_OFFLOAD_SCATTER RTE_BIT64(13)
1544#define RTE_ETH_RX_OFFLOAD_TIMESTAMP RTE_BIT64(14)
1545#define RTE_ETH_RX_OFFLOAD_SECURITY RTE_BIT64(15)
1546#define RTE_ETH_RX_OFFLOAD_KEEP_CRC RTE_BIT64(16)
1547#define RTE_ETH_RX_OFFLOAD_SCTP_CKSUM RTE_BIT64(17)
1548#define RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(18)
1549#define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19)
1550#define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20)
1551
1552#define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
1553 RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
1554 RTE_ETH_RX_OFFLOAD_TCP_CKSUM)
1555#define RTE_ETH_RX_OFFLOAD_VLAN (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
1556 RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \
1557 RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \
1558 RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
1559
1560/*
1561 * If new Rx offload capabilities are defined, they also must be
1562 * mentioned in rte_rx_offload_names in rte_ethdev.c file.
1563 */
1564
1568#define RTE_ETH_TX_OFFLOAD_VLAN_INSERT RTE_BIT64(0)
1569#define RTE_ETH_TX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1570#define RTE_ETH_TX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1571#define RTE_ETH_TX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1572#define RTE_ETH_TX_OFFLOAD_SCTP_CKSUM RTE_BIT64(4)
1573#define RTE_ETH_TX_OFFLOAD_TCP_TSO RTE_BIT64(5)
1574#define RTE_ETH_TX_OFFLOAD_UDP_TSO RTE_BIT64(6)
1575#define RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(7)
1576#define RTE_ETH_TX_OFFLOAD_QINQ_INSERT RTE_BIT64(8)
1577#define RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO RTE_BIT64(9)
1578#define RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO RTE_BIT64(10)
1579#define RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO RTE_BIT64(11)
1580#define RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO RTE_BIT64(12)
1581#define RTE_ETH_TX_OFFLOAD_MACSEC_INSERT RTE_BIT64(13)
1586#define RTE_ETH_TX_OFFLOAD_MT_LOCKFREE RTE_BIT64(14)
1588#define RTE_ETH_TX_OFFLOAD_MULTI_SEGS RTE_BIT64(15)
1594#define RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE RTE_BIT64(16)
1595#define RTE_ETH_TX_OFFLOAD_SECURITY RTE_BIT64(17)
1601#define RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO RTE_BIT64(18)
1607#define RTE_ETH_TX_OFFLOAD_IP_TNL_TSO RTE_BIT64(19)
1609#define RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(20)
1615#define RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP RTE_BIT64(21)
1616/*
1617 * If new Tx offload capabilities are defined, they also must be
1618 * mentioned in rte_tx_offload_names in rte_ethdev.c file.
1619 */
1620
1625#define RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP RTE_BIT64(0)
1627#define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP RTE_BIT64(1)
1637#define RTE_ETH_DEV_CAPA_RXQ_SHARE RTE_BIT64(2)
1639#define RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP RTE_BIT64(3)
1641#define RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP RTE_BIT64(4)
1644/*
1645 * Fallback default preferred Rx/Tx port parameters.
1646 * These are used if an application requests default parameters
1647 * but the PMD does not provide preferred values.
1648 */
1649#define RTE_ETH_DEV_FALLBACK_RX_RINGSIZE 512
1650#define RTE_ETH_DEV_FALLBACK_TX_RINGSIZE 512
1651#define RTE_ETH_DEV_FALLBACK_RX_NBQUEUES 1
1652#define RTE_ETH_DEV_FALLBACK_TX_NBQUEUES 1
1653
1660 uint16_t burst_size;
1661 uint16_t ring_size;
1662 uint16_t nb_queues;
1663};
1664
1669#define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID (UINT16_MAX)
1670
1675 const char *name;
1676 uint16_t domain_id;
1684 uint16_t port_id;
1690 uint16_t rx_domain;
1691};
1692
1700 __extension__
1701 uint32_t multi_pools:1;
1702 uint32_t offset_allowed:1;
1704 uint16_t max_nseg;
1705 uint16_t reserved;
1706};
1707
1721
1743
1826
1828#define RTE_ETH_QUEUE_STATE_STOPPED 0
1829#define RTE_ETH_QUEUE_STATE_STARTED 1
1830#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
1852
1862
1886
1887/* Generic Burst mode flag definition, values can be ORed. */
1888
1894#define RTE_ETH_BURST_FLAG_PER_QUEUE RTE_BIT64(0)
1895
1901 uint64_t flags;
1903#define RTE_ETH_BURST_MODE_INFO_SIZE 1024
1905};
1906
1908#define RTE_ETH_XSTATS_NAME_SIZE 64
1909
1920 uint64_t id;
1921 uint64_t value;
1922};
1923
1941
1942#define RTE_ETH_DCB_NUM_TCS 8
1943#define RTE_ETH_MAX_VMDQ_POOL 64
1944
1951 struct {
1952 uint16_t base;
1953 uint16_t nb_queue;
1954 } tc_rxq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1956 struct {
1957 uint16_t base;
1958 uint16_t nb_queue;
1959 } tc_txq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1960};
1961
1973
1985
1986/* Translate from FEC mode to FEC capa */
1987#define RTE_ETH_FEC_MODE_TO_CAPA(x) RTE_BIT32(x)
1988
1989/* This macro indicates FEC capa mask */
1990#define RTE_ETH_FEC_MODE_CAPA_MASK(x) RTE_BIT32(RTE_ETH_FEC_ ## x)
1991
1992/* A structure used to get capabilities per link speed */
1993struct rte_eth_fec_capa {
1994 uint32_t speed;
1995 uint32_t capa;
1996};
1997
1998#define RTE_ETH_ALL RTE_MAX_ETHPORTS
1999
2000/* Macros to check for valid port */
2001#define RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, retval) do { \
2002 if (!rte_eth_dev_is_valid_port(port_id)) { \
2003 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
2004 return retval; \
2005 } \
2006} while (0)
2007
2008#define RTE_ETH_VALID_PORTID_OR_RET(port_id) do { \
2009 if (!rte_eth_dev_is_valid_port(port_id)) { \
2010 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
2011 return; \
2012 } \
2013} while (0)
2014
2037typedef uint16_t (*rte_rx_callback_fn)(uint16_t port_id, uint16_t queue,
2038 struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts,
2039 void *user_param);
2040
2061typedef uint16_t (*rte_tx_callback_fn)(uint16_t port_id, uint16_t queue,
2062 struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param);
2063
2075
2076struct rte_eth_dev_sriov {
2077 uint8_t active;
2078 uint8_t nb_q_per_pool;
2079 uint16_t def_vmdq_idx;
2080 uint16_t def_pool_q_idx;
2081};
2082#define RTE_ETH_DEV_SRIOV(dev) ((dev)->data->sriov)
2083
2084#define RTE_ETH_NAME_MAX_LEN RTE_DEV_NAME_MAX_LEN
2085
2086#define RTE_ETH_DEV_NO_OWNER 0
2087
2088#define RTE_ETH_MAX_OWNER_NAME_LEN 64
2089
2090struct rte_eth_dev_owner {
2091 uint64_t id;
2092 char name[RTE_ETH_MAX_OWNER_NAME_LEN];
2093};
2094
2100#define RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE RTE_BIT32(0)
2102#define RTE_ETH_DEV_INTR_LSC RTE_BIT32(1)
2104#define RTE_ETH_DEV_BONDING_MEMBER RTE_BIT32(2)
2106#define RTE_ETH_DEV_INTR_RMV RTE_BIT32(3)
2108#define RTE_ETH_DEV_REPRESENTOR RTE_BIT32(4)
2110#define RTE_ETH_DEV_NOLIVE_MAC_ADDR RTE_BIT32(5)
2115#define RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS RTE_BIT32(6)
2129uint64_t rte_eth_find_next_owned_by(uint16_t port_id,
2130 const uint64_t owner_id);
2131
2135#define RTE_ETH_FOREACH_DEV_OWNED_BY(p, o) \
2136 for (p = rte_eth_find_next_owned_by(0, o); \
2137 (unsigned int)p < (unsigned int)RTE_MAX_ETHPORTS; \
2138 p = rte_eth_find_next_owned_by(p + 1, o))
2139
2148uint16_t rte_eth_find_next(uint16_t port_id);
2149
2153#define RTE_ETH_FOREACH_DEV(p) \
2154 RTE_ETH_FOREACH_DEV_OWNED_BY(p, RTE_ETH_DEV_NO_OWNER)
2155
2167uint16_t
2168rte_eth_find_next_of(uint16_t port_id_start,
2169 const struct rte_device *parent);
2170
2179#define RTE_ETH_FOREACH_DEV_OF(port_id, parent) \
2180 for (port_id = rte_eth_find_next_of(0, parent); \
2181 port_id < RTE_MAX_ETHPORTS; \
2182 port_id = rte_eth_find_next_of(port_id + 1, parent))
2183
2195uint16_t
2196rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id);
2197
2208#define RTE_ETH_FOREACH_DEV_SIBLING(port_id, ref_port_id) \
2209 for (port_id = rte_eth_find_next_sibling(0, ref_port_id); \
2210 port_id < RTE_MAX_ETHPORTS; \
2211 port_id = rte_eth_find_next_sibling(port_id + 1, ref_port_id))
2212
2223int rte_eth_dev_owner_new(uint64_t *owner_id);
2224
2235int rte_eth_dev_owner_set(const uint16_t port_id,
2236 const struct rte_eth_dev_owner *owner);
2237
2248int rte_eth_dev_owner_unset(const uint16_t port_id,
2249 const uint64_t owner_id);
2250
2259int rte_eth_dev_owner_delete(const uint64_t owner_id);
2260
2271int rte_eth_dev_owner_get(const uint16_t port_id,
2272 struct rte_eth_dev_owner *owner);
2273
2285
2295
2307uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex);
2308
2317const char *rte_eth_dev_rx_offload_name(uint64_t offload);
2318
2327const char *rte_eth_dev_tx_offload_name(uint64_t offload);
2328
2340__rte_experimental
2341const char *rte_eth_dev_capability_name(uint64_t capability);
2342
2382int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue,
2383 uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf);
2384
2393int
2394rte_eth_dev_is_removed(uint16_t port_id);
2395
2458int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2459 uint16_t nb_rx_desc, unsigned int socket_id,
2460 const struct rte_eth_rxconf *rx_conf,
2461 struct rte_mempool *mb_pool);
2462
2490__rte_experimental
2492 (uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc,
2493 const struct rte_eth_hairpin_conf *conf);
2494
2543int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2544 uint16_t nb_tx_desc, unsigned int socket_id,
2545 const struct rte_eth_txconf *tx_conf);
2546
2572__rte_experimental
2574 (uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc,
2575 const struct rte_eth_hairpin_conf *conf);
2576
2603__rte_experimental
2604int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2605 size_t len, uint32_t direction);
2606
2629__rte_experimental
2630int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port);
2631
2656__rte_experimental
2657int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port);
2658
2674__rte_experimental
2675int rte_eth_dev_count_aggr_ports(uint16_t port_id);
2676
2704__rte_experimental
2705int rte_eth_dev_map_aggr_tx_affinity(uint16_t port_id, uint16_t tx_queue_id,
2706 uint8_t affinity);
2707
2720int rte_eth_dev_socket_id(uint16_t port_id);
2721
2731int rte_eth_dev_is_valid_port(uint16_t port_id);
2732
2749__rte_experimental
2750int rte_eth_rx_queue_is_valid(uint16_t port_id, uint16_t queue_id);
2751
2768__rte_experimental
2769int rte_eth_tx_queue_is_valid(uint16_t port_id, uint16_t queue_id);
2770
2788int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id);
2789
2806int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id);
2807
2825int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id);
2826
2843int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id);
2844
2868int rte_eth_dev_start(uint16_t port_id);
2869
2883int rte_eth_dev_stop(uint16_t port_id);
2884
2897int rte_eth_dev_set_link_up(uint16_t port_id);
2898
2908int rte_eth_dev_set_link_down(uint16_t port_id);
2909
2920int rte_eth_dev_close(uint16_t port_id);
2921
2959int rte_eth_dev_reset(uint16_t port_id);
2960
2972int rte_eth_promiscuous_enable(uint16_t port_id);
2973
2985int rte_eth_promiscuous_disable(uint16_t port_id);
2986
2997int rte_eth_promiscuous_get(uint16_t port_id);
2998
3010int rte_eth_allmulticast_enable(uint16_t port_id);
3011
3023int rte_eth_allmulticast_disable(uint16_t port_id);
3024
3035int rte_eth_allmulticast_get(uint16_t port_id);
3036
3054int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link);
3055
3070int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link);
3071
3085__rte_experimental
3087
3106__rte_experimental
3107int rte_eth_link_to_str(char *str, size_t len,
3108 const struct rte_eth_link *eth_link);
3109
3127int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats);
3128
3140int rte_eth_stats_reset(uint16_t port_id);
3141
3171int rte_eth_xstats_get_names(uint16_t port_id,
3172 struct rte_eth_xstat_name *xstats_names,
3173 unsigned int size);
3174
3208int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3209 unsigned int n);
3210
3235int
3237 struct rte_eth_xstat_name *xstats_names, unsigned int size,
3238 uint64_t *ids);
3239
3264int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3265 uint64_t *values, unsigned int size);
3266
3286int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
3287 uint64_t *id);
3288
3301int rte_eth_xstats_reset(uint16_t port_id);
3302
3322 uint16_t tx_queue_id, uint8_t stat_idx);
3323
3343 uint16_t rx_queue_id,
3344 uint8_t stat_idx);
3345
3359int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr);
3360
3381__rte_experimental
3382int rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,
3383 unsigned int num);
3384
3404int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info);
3405
3421__rte_experimental
3422int rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf);
3423
3444int rte_eth_dev_fw_version_get(uint16_t port_id,
3445 char *fw_version, size_t fw_size);
3446
3486int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3487 uint32_t *ptypes, int num);
3518int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3519 uint32_t *set_ptypes, unsigned int num);
3520
3533int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu);
3534
3552int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu);
3553
3573int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on);
3574
3593int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3594 int on);
3595
3613 enum rte_vlan_type vlan_type,
3614 uint16_t tag_type);
3615
3633int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask);
3634
3648int rte_eth_dev_get_vlan_offload(uint16_t port_id);
3649
3664int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on);
3665
3691__rte_experimental
3692int rte_eth_rx_avail_thresh_set(uint16_t port_id, uint16_t queue_id,
3693 uint8_t avail_thresh);
3694
3721__rte_experimental
3722int rte_eth_rx_avail_thresh_query(uint16_t port_id, uint16_t *queue_id,
3723 uint8_t *avail_thresh);
3724
3725typedef void (*buffer_tx_error_fn)(struct rte_mbuf **unsent, uint16_t count,
3726 void *userdata);
3727
3733 buffer_tx_error_fn error_callback;
3734 void *error_userdata;
3735 uint16_t size;
3736 uint16_t length;
3738 struct rte_mbuf *pkts[];
3739};
3740
3747#define RTE_ETH_TX_BUFFER_SIZE(sz) \
3748 (sizeof(struct rte_eth_dev_tx_buffer) + (sz) * sizeof(struct rte_mbuf *))
3749
3760int
3761rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size);
3762
3787int
3789 buffer_tx_error_fn callback, void *userdata);
3790
3813void
3814rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
3815 void *userdata);
3816
3840void
3841rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
3842 void *userdata);
3843
3869int
3870rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt);
3871
3905
3926
3947
3986
4013
4091
4093typedef int (*rte_eth_dev_cb_fn)(uint16_t port_id,
4094 enum rte_eth_event_type event, void *cb_arg, void *ret_param);
4095
4114 enum rte_eth_event_type event,
4115 rte_eth_dev_cb_fn cb_fn, void *cb_arg);
4116
4136 enum rte_eth_event_type event,
4137 rte_eth_dev_cb_fn cb_fn, void *cb_arg);
4138
4160int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id);
4161
4182int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id);
4183
4201int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data);
4202
4224int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4225 int epfd, int op, void *data);
4226
4241int
4242rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id);
4243
4257int rte_eth_led_on(uint16_t port_id);
4258
4272int rte_eth_led_off(uint16_t port_id);
4273
4302__rte_experimental
4303int rte_eth_fec_get_capability(uint16_t port_id,
4304 struct rte_eth_fec_capa *speed_fec_capa,
4305 unsigned int num);
4306
4327__rte_experimental
4328int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa);
4329
4353__rte_experimental
4354int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa);
4355
4370int rte_eth_dev_flow_ctrl_get(uint16_t port_id,
4371 struct rte_eth_fc_conf *fc_conf);
4372
4387int rte_eth_dev_flow_ctrl_set(uint16_t port_id,
4388 struct rte_eth_fc_conf *fc_conf);
4389
4406 struct rte_eth_pfc_conf *pfc_conf);
4407
4426int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr,
4427 uint32_t pool);
4428
4446__rte_experimental
4448 struct rte_eth_pfc_queue_info *pfc_queue_info);
4449
4473__rte_experimental
4475 struct rte_eth_pfc_queue_conf *pfc_queue_conf);
4476
4491int rte_eth_dev_mac_addr_remove(uint16_t port_id,
4492 struct rte_ether_addr *mac_addr);
4493
4512 struct rte_ether_addr *mac_addr);
4513
4531int rte_eth_dev_rss_reta_update(uint16_t port_id,
4532 struct rte_eth_rss_reta_entry64 *reta_conf,
4533 uint16_t reta_size);
4534
4553int rte_eth_dev_rss_reta_query(uint16_t port_id,
4554 struct rte_eth_rss_reta_entry64 *reta_conf,
4555 uint16_t reta_size);
4556
4576int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4577 uint8_t on);
4578
4597int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on);
4598
4615int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4616 uint32_t tx_rate);
4617
4632int rte_eth_dev_rss_hash_update(uint16_t port_id,
4633 struct rte_eth_rss_conf *rss_conf);
4634
4650int
4652 struct rte_eth_rss_conf *rss_conf);
4653
4666__rte_experimental
4667const char *
4669
4694int
4696 struct rte_eth_udp_tunnel *tunnel_udp);
4697
4717int
4719 struct rte_eth_udp_tunnel *tunnel_udp);
4720
4735int rte_eth_dev_get_dcb_info(uint16_t port_id,
4736 struct rte_eth_dcb_info *dcb_info);
4737
4738struct rte_eth_rxtx_callback;
4739
4765const struct rte_eth_rxtx_callback *
4766rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4767 rte_rx_callback_fn fn, void *user_param);
4768
4795const struct rte_eth_rxtx_callback *
4796rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4797 rte_rx_callback_fn fn, void *user_param);
4798
4824const struct rte_eth_rxtx_callback *
4825rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4826 rte_tx_callback_fn fn, void *user_param);
4827
4861int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4862 const struct rte_eth_rxtx_callback *user_cb);
4863
4897int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4898 const struct rte_eth_rxtx_callback *user_cb);
4899
4919int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4920 struct rte_eth_rxq_info *qinfo);
4921
4941int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4942 struct rte_eth_txq_info *qinfo);
4943
4964__rte_experimental
4966 uint16_t queue_id,
4967 struct rte_eth_recycle_rxq_info *recycle_rxq_info);
4968
4987int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4988 struct rte_eth_burst_mode *mode);
4989
5008int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5009 struct rte_eth_burst_mode *mode);
5010
5031__rte_experimental
5032int rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5033 struct rte_power_monitor_cond *pmc);
5034
5053int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info);
5054
5067int rte_eth_dev_get_eeprom_length(uint16_t port_id);
5068
5085int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info);
5086
5103int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info);
5104
5123__rte_experimental
5124int
5126 struct rte_eth_dev_module_info *modinfo);
5127
5147__rte_experimental
5148int
5150 struct rte_dev_eeprom_info *info);
5151
5171int rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5172 struct rte_ether_addr *mc_addr_set,
5173 uint32_t nb_mc_addr);
5174
5187int rte_eth_timesync_enable(uint16_t port_id);
5188
5201int rte_eth_timesync_disable(uint16_t port_id);
5202
5222 struct timespec *timestamp, uint32_t flags);
5223
5240 struct timespec *timestamp);
5241
5259int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta);
5260
5276int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time);
5277
5296int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time);
5297
5343__rte_experimental
5344int
5345rte_eth_read_clock(uint16_t port_id, uint64_t *clock);
5346
5362int
5363rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id);
5364
5381int
5382rte_eth_dev_get_name_by_port(uint16_t port_id, char *name);
5383
5401 uint16_t *nb_rx_desc,
5402 uint16_t *nb_tx_desc);
5403
5418int
5419rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool);
5420
5430void *
5431rte_eth_dev_get_sec_ctx(uint16_t port_id);
5432
5448__rte_experimental
5450 struct rte_eth_hairpin_cap *cap);
5451
5461 int pf;
5462 __extension__
5463 union {
5464 int vf;
5465 int sf;
5466 };
5467 uint32_t id_base;
5468 uint32_t id_end;
5469 char name[RTE_DEV_NAME_MAX_LEN];
5470};
5471
5485
5509__rte_experimental
5510int rte_eth_representor_info_get(uint16_t port_id,
5511 struct rte_eth_representor_info *info);
5512
5514#define RTE_ETH_RX_METADATA_USER_FLAG RTE_BIT64(0)
5515
5517#define RTE_ETH_RX_METADATA_USER_MARK RTE_BIT64(1)
5518
5520#define RTE_ETH_RX_METADATA_TUNNEL_ID RTE_BIT64(2)
5521
5561int rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features);
5562
5564#define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0))
5566#define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1))
5567
5578 uint32_t timeout_ms;
5580 uint16_t max_frags;
5585 uint16_t flags;
5586};
5587
5608__rte_experimental
5610 struct rte_eth_ip_reassembly_params *capa);
5611
5633__rte_experimental
5635 struct rte_eth_ip_reassembly_params *conf);
5636
5666__rte_experimental
5668 const struct rte_eth_ip_reassembly_params *conf);
5669
5677typedef struct {
5684 uint16_t time_spent;
5686 uint16_t nb_frags;
5688
5707__rte_experimental
5708int rte_eth_dev_priv_dump(uint16_t port_id, FILE *file);
5709
5733__rte_experimental
5734int rte_eth_rx_descriptor_dump(uint16_t port_id, uint16_t queue_id,
5735 uint16_t offset, uint16_t num, FILE *file);
5736
5760__rte_experimental
5761int rte_eth_tx_descriptor_dump(uint16_t port_id, uint16_t queue_id,
5762 uint16_t offset, uint16_t num, FILE *file);
5763
5764
5765/* Congestion management */
5766
5777
5799 uint8_t rsvd[8];
5800};
5801
5813 union {
5820 uint16_t rx_queue;
5828 } obj_param;
5829 union {
5843 } mode_param;
5844};
5845
5863__rte_experimental
5864int rte_eth_cman_info_get(uint16_t port_id, struct rte_eth_cman_info *info);
5865
5883__rte_experimental
5884int rte_eth_cman_config_init(uint16_t port_id, struct rte_eth_cman_config *config);
5885
5902__rte_experimental
5903int rte_eth_cman_config_set(uint16_t port_id, const struct rte_eth_cman_config *config);
5904
5925__rte_experimental
5926int rte_eth_cman_config_get(uint16_t port_id, struct rte_eth_cman_config *config);
5927
5928#include <rte_ethdev_core.h>
5929
5953uint16_t rte_eth_call_rx_callbacks(uint16_t port_id, uint16_t queue_id,
5954 struct rte_mbuf **rx_pkts, uint16_t nb_rx, uint16_t nb_pkts,
5955 void *opaque);
5956
6044static inline uint16_t
6045rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,
6046 struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
6047{
6048 uint16_t nb_rx;
6049 struct rte_eth_fp_ops *p;
6050 void *qd;
6051
6052#ifdef RTE_ETHDEV_DEBUG_RX
6053 if (port_id >= RTE_MAX_ETHPORTS ||
6054 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6055 RTE_ETHDEV_LOG(ERR,
6056 "Invalid port_id=%u or queue_id=%u\n",
6057 port_id, queue_id);
6058 return 0;
6059 }
6060#endif
6061
6062 /* fetch pointer to queue data */
6063 p = &rte_eth_fp_ops[port_id];
6064 qd = p->rxq.data[queue_id];
6065
6066#ifdef RTE_ETHDEV_DEBUG_RX
6067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
6068
6069 if (qd == NULL) {
6070 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u for port_id=%u\n",
6071 queue_id, port_id);
6072 return 0;
6073 }
6074#endif
6075
6076 nb_rx = p->rx_pkt_burst(qd, rx_pkts, nb_pkts);
6077
6078#ifdef RTE_ETHDEV_RXTX_CALLBACKS
6079 {
6080 void *cb;
6081
6082 /* rte_memory_order_release memory order was used when the
6083 * call back was inserted into the list.
6084 * Since there is a clear dependency between loading
6085 * cb and cb->fn/cb->next, rte_memory_order_acquire memory order is
6086 * not required.
6087 */
6088 cb = rte_atomic_load_explicit(&p->rxq.clbk[queue_id],
6089 rte_memory_order_relaxed);
6090 if (unlikely(cb != NULL))
6091 nb_rx = rte_eth_call_rx_callbacks(port_id, queue_id,
6092 rx_pkts, nb_rx, nb_pkts, cb);
6093 }
6094#endif
6095
6096 rte_ethdev_trace_rx_burst(port_id, queue_id, (void **)rx_pkts, nb_rx);
6097 return nb_rx;
6098}
6099
6117static inline int
6118rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
6119{
6120 struct rte_eth_fp_ops *p;
6121 void *qd;
6122
6123#ifdef RTE_ETHDEV_DEBUG_RX
6124 if (port_id >= RTE_MAX_ETHPORTS ||
6125 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6126 RTE_ETHDEV_LOG(ERR,
6127 "Invalid port_id=%u or queue_id=%u\n",
6128 port_id, queue_id);
6129 return -EINVAL;
6130 }
6131#endif
6132
6133 /* fetch pointer to queue data */
6134 p = &rte_eth_fp_ops[port_id];
6135 qd = p->rxq.data[queue_id];
6136
6137#ifdef RTE_ETHDEV_DEBUG_RX
6138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6139 if (qd == NULL)
6140 return -EINVAL;
6141#endif
6142
6143 if (*p->rx_queue_count == NULL)
6144 return -ENOTSUP;
6145 return (int)(*p->rx_queue_count)(qd);
6146}
6147
6151#define RTE_ETH_RX_DESC_AVAIL 0
6152#define RTE_ETH_RX_DESC_DONE 1
6153#define RTE_ETH_RX_DESC_UNAVAIL 2
6189static inline int
6190rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id,
6191 uint16_t offset)
6192{
6193 struct rte_eth_fp_ops *p;
6194 void *qd;
6195
6196#ifdef RTE_ETHDEV_DEBUG_RX
6197 if (port_id >= RTE_MAX_ETHPORTS ||
6198 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6199 RTE_ETHDEV_LOG(ERR,
6200 "Invalid port_id=%u or queue_id=%u\n",
6201 port_id, queue_id);
6202 return -EINVAL;
6203 }
6204#endif
6205
6206 /* fetch pointer to queue data */
6207 p = &rte_eth_fp_ops[port_id];
6208 qd = p->rxq.data[queue_id];
6209
6210#ifdef RTE_ETHDEV_DEBUG_RX
6211 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6212 if (qd == NULL)
6213 return -ENODEV;
6214#endif
6215 if (*p->rx_descriptor_status == NULL)
6216 return -ENOTSUP;
6217 return (*p->rx_descriptor_status)(qd, offset);
6218}
6219
6223#define RTE_ETH_TX_DESC_FULL 0
6224#define RTE_ETH_TX_DESC_DONE 1
6225#define RTE_ETH_TX_DESC_UNAVAIL 2
6261static inline int rte_eth_tx_descriptor_status(uint16_t port_id,
6262 uint16_t queue_id, uint16_t offset)
6263{
6264 struct rte_eth_fp_ops *p;
6265 void *qd;
6266
6267#ifdef RTE_ETHDEV_DEBUG_TX
6268 if (port_id >= RTE_MAX_ETHPORTS ||
6269 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6270 RTE_ETHDEV_LOG(ERR,
6271 "Invalid port_id=%u or queue_id=%u\n",
6272 port_id, queue_id);
6273 return -EINVAL;
6274 }
6275#endif
6276
6277 /* fetch pointer to queue data */
6278 p = &rte_eth_fp_ops[port_id];
6279 qd = p->txq.data[queue_id];
6280
6281#ifdef RTE_ETHDEV_DEBUG_TX
6282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6283 if (qd == NULL)
6284 return -ENODEV;
6285#endif
6286 if (*p->tx_descriptor_status == NULL)
6287 return -ENOTSUP;
6288 return (*p->tx_descriptor_status)(qd, offset);
6289}
6290
6310uint16_t rte_eth_call_tx_callbacks(uint16_t port_id, uint16_t queue_id,
6311 struct rte_mbuf **tx_pkts, uint16_t nb_pkts, void *opaque);
6312
6384static inline uint16_t
6385rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id,
6386 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6387{
6388 struct rte_eth_fp_ops *p;
6389 void *qd;
6390
6391#ifdef RTE_ETHDEV_DEBUG_TX
6392 if (port_id >= RTE_MAX_ETHPORTS ||
6393 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6394 RTE_ETHDEV_LOG(ERR,
6395 "Invalid port_id=%u or queue_id=%u\n",
6396 port_id, queue_id);
6397 return 0;
6398 }
6399#endif
6400
6401 /* fetch pointer to queue data */
6402 p = &rte_eth_fp_ops[port_id];
6403 qd = p->txq.data[queue_id];
6404
6405#ifdef RTE_ETHDEV_DEBUG_TX
6406 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
6407
6408 if (qd == NULL) {
6409 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u for port_id=%u\n",
6410 queue_id, port_id);
6411 return 0;
6412 }
6413#endif
6414
6415#ifdef RTE_ETHDEV_RXTX_CALLBACKS
6416 {
6417 void *cb;
6418
6419 /* rte_memory_order_release memory order was used when the
6420 * call back was inserted into the list.
6421 * Since there is a clear dependency between loading
6422 * cb and cb->fn/cb->next, rte_memory_order_acquire memory order is
6423 * not required.
6424 */
6425 cb = rte_atomic_load_explicit(&p->txq.clbk[queue_id],
6426 rte_memory_order_relaxed);
6427 if (unlikely(cb != NULL))
6428 nb_pkts = rte_eth_call_tx_callbacks(port_id, queue_id,
6429 tx_pkts, nb_pkts, cb);
6430 }
6431#endif
6432
6433 nb_pkts = p->tx_pkt_burst(qd, tx_pkts, nb_pkts);
6434
6435 rte_ethdev_trace_tx_burst(port_id, queue_id, (void **)tx_pkts, nb_pkts);
6436 return nb_pkts;
6437}
6438
6492#ifndef RTE_ETHDEV_TX_PREPARE_NOOP
6493
6494static inline uint16_t
6495rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id,
6496 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6497{
6498 struct rte_eth_fp_ops *p;
6499 void *qd;
6500
6501#ifdef RTE_ETHDEV_DEBUG_TX
6502 if (port_id >= RTE_MAX_ETHPORTS ||
6503 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6504 RTE_ETHDEV_LOG(ERR,
6505 "Invalid port_id=%u or queue_id=%u\n",
6506 port_id, queue_id);
6507 rte_errno = ENODEV;
6508 return 0;
6509 }
6510#endif
6511
6512 /* fetch pointer to queue data */
6513 p = &rte_eth_fp_ops[port_id];
6514 qd = p->txq.data[queue_id];
6515
6516#ifdef RTE_ETHDEV_DEBUG_TX
6517 if (!rte_eth_dev_is_valid_port(port_id)) {
6518 RTE_ETHDEV_LOG(ERR, "Invalid Tx port_id=%u\n", port_id);
6519 rte_errno = ENODEV;
6520 return 0;
6521 }
6522 if (qd == NULL) {
6523 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u for port_id=%u\n",
6524 queue_id, port_id);
6525 rte_errno = EINVAL;
6526 return 0;
6527 }
6528#endif
6529
6530 if (!p->tx_pkt_prepare)
6531 return nb_pkts;
6532
6533 return p->tx_pkt_prepare(qd, tx_pkts, nb_pkts);
6534}
6535
6536#else
6537
6538/*
6539 * Native NOOP operation for compilation targets which doesn't require any
6540 * preparations steps, and functional NOOP may introduce unnecessary performance
6541 * drop.
6542 *
6543 * Generally this is not a good idea to turn it on globally and didn't should
6544 * be used if behavior of tx_preparation can change.
6545 */
6546
6547static inline uint16_t
6548rte_eth_tx_prepare(__rte_unused uint16_t port_id,
6549 __rte_unused uint16_t queue_id,
6550 __rte_unused struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6551{
6552 return nb_pkts;
6553}
6554
6555#endif
6556
6579static inline uint16_t
6580rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id,
6581 struct rte_eth_dev_tx_buffer *buffer)
6582{
6583 uint16_t sent;
6584 uint16_t to_send = buffer->length;
6585
6586 if (to_send == 0)
6587 return 0;
6588
6589 sent = rte_eth_tx_burst(port_id, queue_id, buffer->pkts, to_send);
6590
6591 buffer->length = 0;
6592
6593 /* All packets sent, or to be dealt with by callback below */
6594 if (unlikely(sent != to_send))
6595 buffer->error_callback(&buffer->pkts[sent],
6596 (uint16_t)(to_send - sent),
6597 buffer->error_userdata);
6598
6599 return sent;
6600}
6601
6632static __rte_always_inline uint16_t
6633rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id,
6634 struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
6635{
6636 buffer->pkts[buffer->length++] = tx_pkt;
6637 if (buffer->length < buffer->size)
6638 return 0;
6639
6640 return rte_eth_tx_buffer_flush(port_id, queue_id, buffer);
6641}
6642
6696__rte_experimental
6697static inline uint16_t
6698rte_eth_recycle_mbufs(uint16_t rx_port_id, uint16_t rx_queue_id,
6699 uint16_t tx_port_id, uint16_t tx_queue_id,
6700 struct rte_eth_recycle_rxq_info *recycle_rxq_info)
6701{
6702 struct rte_eth_fp_ops *p1, *p2;
6703 void *qd1, *qd2;
6704 uint16_t nb_mbufs;
6705
6706#ifdef RTE_ETHDEV_DEBUG_TX
6707 if (tx_port_id >= RTE_MAX_ETHPORTS ||
6708 tx_queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6709 RTE_ETHDEV_LOG(ERR,
6710 "Invalid tx_port_id=%u or tx_queue_id=%u\n",
6711 tx_port_id, tx_queue_id);
6712 return 0;
6713 }
6714#endif
6715
6716 /* fetch pointer to Tx queue data */
6717 p1 = &rte_eth_fp_ops[tx_port_id];
6718 qd1 = p1->txq.data[tx_queue_id];
6719
6720#ifdef RTE_ETHDEV_DEBUG_TX
6721 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port_id, 0);
6722
6723 if (qd1 == NULL) {
6724 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u for port_id=%u\n",
6725 tx_queue_id, tx_port_id);
6726 return 0;
6727 }
6728#endif
6729 if (p1->recycle_tx_mbufs_reuse == NULL)
6730 return 0;
6731
6732#ifdef RTE_ETHDEV_DEBUG_RX
6733 if (rx_port_id >= RTE_MAX_ETHPORTS ||
6734 rx_queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6735 RTE_ETHDEV_LOG(ERR, "Invalid rx_port_id=%u or rx_queue_id=%u\n",
6736 rx_port_id, rx_queue_id);
6737 return 0;
6738 }
6739#endif
6740
6741 /* fetch pointer to Rx queue data */
6742 p2 = &rte_eth_fp_ops[rx_port_id];
6743 qd2 = p2->rxq.data[rx_queue_id];
6744
6745#ifdef RTE_ETHDEV_DEBUG_RX
6746 RTE_ETH_VALID_PORTID_OR_ERR_RET(rx_port_id, 0);
6747
6748 if (qd2 == NULL) {
6749 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u for port_id=%u\n",
6750 rx_queue_id, rx_port_id);
6751 return 0;
6752 }
6753#endif
6754 if (p2->recycle_rx_descriptors_refill == NULL)
6755 return 0;
6756
6757 /* Copy used *rte_mbuf* buffer pointers from Tx mbuf ring
6758 * into Rx mbuf ring.
6759 */
6760 nb_mbufs = p1->recycle_tx_mbufs_reuse(qd1, recycle_rxq_info);
6761
6762 /* If no recycling mbufs, return 0. */
6763 if (nb_mbufs == 0)
6764 return 0;
6765
6766 /* Replenish the Rx descriptors with the recycling
6767 * into Rx mbuf ring.
6768 */
6769 p2->recycle_rx_descriptors_refill(qd2, nb_mbufs);
6770
6771 return nb_mbufs;
6772}
6773
6802__rte_experimental
6803int rte_eth_buffer_split_get_supported_hdr_ptypes(uint16_t port_id, uint32_t *ptypes, int num);
6804
6805#ifdef __cplusplus
6806}
6807#endif
6808
6809#endif /* _RTE_ETHDEV_H_ */
#define RTE_BIT32(nr)
Definition rte_bitops.h:40
#define unlikely(x)
rte_cman_mode
Definition rte_cman.h:20
#define __rte_cache_min_aligned
Definition rte_common.h:528
#define __rte_unused
Definition rte_common.h:143
#define __rte_always_inline
Definition rte_common.h:331
#define rte_errno
Definition rte_errno.h:29
int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
rte_eth_nb_pools
Definition rte_ethdev.h:906
@ RTE_ETH_64_POOLS
Definition rte_ethdev.h:910
@ RTE_ETH_32_POOLS
Definition rte_ethdev.h:909
@ RTE_ETH_8_POOLS
Definition rte_ethdev.h:907
@ RTE_ETH_16_POOLS
Definition rte_ethdev.h:908
rte_eth_event_ipsec_subtype
@ RTE_ETH_EVENT_IPSEC_PMD_ERROR_END
@ RTE_ETH_EVENT_IPSEC_UNKNOWN
@ RTE_ETH_EVENT_IPSEC_MAX
@ RTE_ETH_EVENT_IPSEC_SA_PKT_EXPIRY
@ RTE_ETH_EVENT_IPSEC_ESN_OVERFLOW
@ RTE_ETH_EVENT_IPSEC_SA_BYTE_HARD_EXPIRY
@ RTE_ETH_EVENT_IPSEC_PMD_ERROR_START
@ RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY
@ RTE_ETH_EVENT_IPSEC_SA_TIME_EXPIRY
@ RTE_ETH_EVENT_IPSEC_SA_PKT_HARD_EXPIRY
int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time)
__rte_experimental int rte_eth_cman_config_get(uint16_t port_id, struct rte_eth_cman_config *config)
int rte_eth_dev_is_removed(uint16_t port_id)
__rte_experimental int rte_eth_dev_hairpin_capability_get(uint16_t port_id, struct rte_eth_hairpin_cap *cap)
int rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
int rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp, uint32_t flags)
static uint64_t rte_eth_rss_hf_refine(uint64_t rss_hf)
Definition rte_ethdev.h:660
__rte_experimental int rte_eth_dev_map_aggr_tx_affinity(uint16_t port_id, uint16_t tx_queue_id, uint8_t affinity)
static __rte_always_inline uint16_t rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
void rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
int rte_eth_dev_set_link_down(uint16_t port_id)
rte_eth_event_macsec_subtype
@ RTE_ETH_SUBEVENT_MACSEC_UNKNOWN
@ RTE_ETH_SUBEVENT_MACSEC_RX_SECTAG_E_EQ0_C_EQ1
@ RTE_ETH_SUBEVENT_MACSEC_RX_SECTAG_SL_GTE48
@ RTE_ETH_SUBEVENT_MACSEC_RX_SECTAG_SC_EQ1_SCB_EQ1
@ RTE_ETH_SUBEVENT_MACSEC_RX_SECTAG_ES_EQ1_SC_EQ1
@ RTE_ETH_SUBEVENT_MACSEC_RX_SECTAG_V_EQ1
int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue, uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf)
int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id, int epfd, int op, void *data)
rte_eth_event_type
@ RTE_ETH_EVENT_RECOVERY_FAILED
@ RTE_ETH_EVENT_UNKNOWN
@ RTE_ETH_EVENT_VF_MBOX
@ RTE_ETH_EVENT_IPSEC
@ RTE_ETH_EVENT_INTR_RESET
@ RTE_ETH_EVENT_INTR_RMV
@ RTE_ETH_EVENT_ERR_RECOVERING
@ RTE_ETH_EVENT_MACSEC
@ RTE_ETH_EVENT_RECOVERY_SUCCESS
@ RTE_ETH_EVENT_DESTROY
@ RTE_ETH_EVENT_FLOW_AGED
@ RTE_ETH_EVENT_QUEUE_STATE
@ RTE_ETH_EVENT_INTR_LSC
@ RTE_ETH_EVENT_MAX
@ RTE_ETH_EVENT_RX_AVAIL_THRESH
@ RTE_ETH_EVENT_NEW
int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
__rte_experimental int rte_eth_dev_get_module_info(uint16_t port_id, struct rte_eth_dev_module_info *modinfo)
int rte_eth_dev_is_valid_port(uint16_t port_id)
rte_eth_cman_obj
@ RTE_ETH_CMAN_OBJ_RX_QUEUE_MEMPOOL
@ RTE_ETH_CMAN_OBJ_RX_QUEUE
#define RTE_ETH_DCB_NUM_USER_PRIORITIES
Definition rte_ethdev.h:836
__rte_experimental int rte_eth_recycle_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_recycle_rxq_info *recycle_rxq_info)
__rte_experimental int rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)
int rte_eth_dev_reset(uint16_t port_id)
#define RTE_ETH_BURST_MODE_INFO_SIZE
__rte_experimental const char * rte_eth_dev_capability_name(uint64_t capability)
int rte_eth_allmulticast_disable(uint16_t port_id)
int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats, unsigned int n)
rte_eth_dev_state
@ RTE_ETH_DEV_ATTACHED
@ RTE_ETH_DEV_UNUSED
@ RTE_ETH_DEV_REMOVED
int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id, const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mb_pool)
int rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
__rte_experimental int rte_eth_dev_count_aggr_ports(uint16_t port_id)
int rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
int rte_eth_dev_rss_reta_update(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
static uint16_t rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
rte_eth_fec_mode
@ RTE_ETH_FEC_NOFEC
@ RTE_ETH_FEC_BASER
@ RTE_ETH_FEC_AUTO
@ RTE_ETH_FEC_RS
@ RTE_ETH_FEC_LLRS
int rte_eth_xstats_get_names(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size)
int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
__rte_experimental int rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
rte_eth_err_handle_mode
@ RTE_ETH_ERROR_HANDLE_MODE_PASSIVE
@ RTE_ETH_ERROR_HANDLE_MODE_NONE
@ RTE_ETH_ERROR_HANDLE_MODE_PROACTIVE
const struct rte_eth_rxtx_callback * rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
int rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
rte_eth_tx_mq_mode
Definition rte_ethdev.h:402
@ RTE_ETH_MQ_TX_DCB
Definition rte_ethdev.h:404
@ RTE_ETH_MQ_TX_VMDQ_DCB
Definition rte_ethdev.h:405
@ RTE_ETH_MQ_TX_VMDQ_ONLY
Definition rte_ethdev.h:406
@ RTE_ETH_MQ_TX_NONE
Definition rte_ethdev.h:403
int rte_eth_promiscuous_get(uint16_t port_id)
uint64_t rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
int rte_eth_led_off(uint16_t port_id)
int rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
int rte_eth_dev_set_link_up(uint16_t port_id)
__rte_experimental int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link)
int rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id, uint8_t stat_idx)
uint16_t rte_eth_find_next(uint16_t port_id)
rte_eth_rx_mq_mode
Definition rte_ethdev.h:376
@ RTE_ETH_MQ_RX_DCB_RSS
Definition rte_ethdev.h:385
@ RTE_ETH_MQ_RX_VMDQ_DCB_RSS
Definition rte_ethdev.h:394
@ RTE_ETH_MQ_RX_DCB
Definition rte_ethdev.h:383
@ RTE_ETH_MQ_RX_VMDQ_DCB
Definition rte_ethdev.h:392
@ RTE_ETH_MQ_RX_VMDQ_RSS
Definition rte_ethdev.h:390
@ RTE_ETH_MQ_RX_NONE
Definition rte_ethdev.h:378
@ RTE_ETH_MQ_RX_RSS
Definition rte_ethdev.h:381
@ RTE_ETH_MQ_RX_VMDQ_ONLY
Definition rte_ethdev.h:388
int rte_eth_allmulticast_get(uint16_t port_id)
int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids, uint64_t *values, unsigned int size)
int rte_eth_allmulticast_enable(uint16_t port_id)
int rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
int rte_eth_promiscuous_enable(uint16_t port_id)
rte_eth_representor_type
@ RTE_ETH_REPRESENTOR_PF
@ RTE_ETH_REPRESENTOR_VF
@ RTE_ETH_REPRESENTOR_SF
@ RTE_ETH_REPRESENTOR_NONE
int rte_eth_timesync_enable(uint16_t port_id)
__rte_experimental int rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
int rte_eth_dev_rss_hash_conf_get(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
#define RTE_ETH_VMDQ_MAX_VLAN_FILTERS
Definition rte_ethdev.h:835
int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id, struct rte_eth_pfc_conf *pfc_conf)
int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
int rte_eth_dev_udp_tunnel_port_add(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
uint16_t rte_eth_iterator_next(struct rte_dev_iterator *iter)
__rte_experimental int rte_eth_ip_reassembly_capability_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *capa)
__rte_experimental int rte_eth_dev_get_module_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id, int on)
int rte_eth_dev_set_vlan_ether_type(uint16_t port_id, enum rte_vlan_type vlan_type, uint16_t tag_type)
int rte_eth_dev_stop(uint16_t port_id)
int rte_eth_timesync_disable(uint16_t port_id)
__rte_experimental int rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, const struct rte_eth_hairpin_conf *conf)
uint16_t(* rte_rx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts, void *user_param)
int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
static uint16_t rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
rte_eth_tunnel_type
int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, unsigned int socket_id, const struct rte_eth_txconf *tx_conf)
const struct rte_eth_rxtx_callback * rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id, rte_tx_callback_fn fn, void *user_param)
int rte_eth_promiscuous_disable(uint16_t port_id)
int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id)
int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
int rte_eth_dev_owner_delete(const uint64_t owner_id)
__rte_experimental int rte_eth_rx_queue_is_valid(uint16_t port_id, uint16_t queue_id)
int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
static uint16_t rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
int rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
__rte_experimental int rte_eth_rx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
int(* rte_eth_dev_cb_fn)(uint16_t port_id, enum rte_eth_event_type event, void *cb_arg, void *ret_param)
int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id)
int rte_eth_dev_get_eeprom_length(uint16_t port_id)
int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
int rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *mac_addr)
int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
int rte_eth_xstats_get_names_by_id(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size, uint64_t *ids)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id, struct rte_eth_pfc_queue_info *pfc_queue_info)
__rte_experimental int rte_eth_buffer_split_get_supported_hdr_ptypes(uint16_t port_id, uint32_t *ptypes, int num)
#define RTE_ETH_MQ_RX_DCB_FLAG
Definition rte_ethdev.h:368
uint16_t rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id)
const struct rte_eth_rxtx_callback * rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name, uint64_t *id)
uint16_t rte_eth_dev_count_avail(void)
int rte_eth_dev_callback_unregister(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
__rte_experimental int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
rte_eth_fc_mode
@ RTE_ETH_FC_TX_PAUSE
@ RTE_ETH_FC_RX_PAUSE
@ RTE_ETH_FC_NONE
@ RTE_ETH_FC_FULL
rte_eth_event_macsec_type
@ RTE_ETH_EVENT_MACSEC_RX_SA_PN_HARD_EXP
@ RTE_ETH_EVENT_MACSEC_SA_NOT_VALID
@ RTE_ETH_EVENT_MACSEC_RX_SA_PN_SOFT_EXP
@ RTE_ETH_EVENT_MACSEC_UNKNOWN
@ RTE_ETH_EVENT_MACSEC_TX_SA_PN_HARD_EXP
@ RTE_ETH_EVENT_MACSEC_SECTAG_VAL_ERR
@ RTE_ETH_EVENT_MACSEC_TX_SA_PN_SOFT_EXP
int rte_eth_led_on(uint16_t port_id)
int rte_eth_dev_rss_reta_query(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
__rte_experimental int rte_eth_ip_reassembly_conf_set(uint16_t port_id, const struct rte_eth_ip_reassembly_params *conf)
__rte_experimental int rte_eth_rx_avail_thresh_set(uint16_t port_id, uint16_t queue_id, uint8_t avail_thresh)
int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *ptypes, int num)
__rte_experimental int rte_eth_cman_info_get(uint16_t port_id, struct rte_eth_cman_info *info)
int rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
int rte_eth_dev_set_mc_addr_list(uint16_t port_id, struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr)
int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs)
int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
int rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer, buffer_tx_error_fn callback, void *userdata)
int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr, uint32_t pool)
uint32_t link_speed
Definition rte_ethdev.h:0
int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr, uint8_t on)
int rte_eth_dev_owner_set(const uint16_t port_id, const struct rte_eth_dev_owner *owner)
uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex)
__rte_experimental int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id, struct rte_eth_pfc_queue_conf *pfc_queue_conf)
__rte_experimental int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports, size_t len, uint32_t direction)
int rte_eth_dev_get_vlan_offload(uint16_t port_id)
#define RTE_ETH_MQ_RX_RSS_FLAG
Definition rte_ethdev.h:367
int rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_rxq_info *qinfo)
int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
void * rte_eth_dev_get_sec_ctx(uint16_t port_id)
int rte_eth_dev_callback_register(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
int rte_eth_dev_close(uint16_t port_id)
void rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
__rte_experimental int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
int rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
__rte_experimental int rte_eth_ip_reassembly_conf_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *conf)
__rte_experimental int rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id, struct rte_power_monitor_cond *pmc)
int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_txq_info *qinfo)
const char * rte_eth_dev_rx_offload_name(uint64_t offload)
int rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
int rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
#define RTE_ETH_MQ_RX_VMDQ_FLAG
Definition rte_ethdev.h:369
__rte_experimental int rte_eth_tx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
__rte_experimental int rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)
void rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
__rte_experimental int rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, const struct rte_eth_hairpin_conf *conf)
int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
static uint16_t rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer)
int rte_eth_dev_socket_id(uint16_t port_id)
int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link)
int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
int rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id, uint16_t *nb_rx_desc, uint16_t *nb_tx_desc)
static int rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id, uint16_t offset)
__rte_experimental int rte_eth_tx_queue_is_valid(uint16_t port_id, uint16_t queue_id)
static int rte_eth_tx_descriptor_status(uint16_t port_id, uint16_t queue_id, uint16_t offset)
int rte_eth_dev_get_dcb_info(uint16_t port_id, struct rte_eth_dcb_info *dcb_info)
static __rte_experimental uint16_t rte_eth_recycle_mbufs(uint16_t rx_port_id, uint16_t rx_queue_id, uint16_t tx_port_id, uint16_t tx_queue_id, struct rte_eth_recycle_rxq_info *recycle_rxq_info)
int rte_eth_dev_rss_hash_update(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
int rte_eth_dev_owner_new(uint64_t *owner_id)
int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *set_ptypes, unsigned int num)
int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time)
__rte_experimental int rte_eth_rx_avail_thresh_query(uint16_t port_id, uint16_t *queue_id, uint8_t *avail_thresh)
int rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *mac_addr)
__rte_experimental const char * rte_eth_link_speed_to_str(uint32_t link_speed)
int rte_eth_xstats_reset(uint16_t port_id)
int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx, uint32_t tx_rate)
__rte_experimental const char * rte_eth_dev_rss_algo_name(enum rte_eth_hash_function rss_algo)
int rte_eth_timesync_read_tx_timestamp(uint16_t port_id, struct timespec *timestamp)
uint16_t rte_eth_find_next_of(uint16_t port_id_start, const struct rte_device *parent)
rte_vlan_type
Definition rte_ethdev.h:433
@ RTE_ETH_VLAN_TYPE_OUTER
Definition rte_ethdev.h:436
@ RTE_ETH_VLAN_TYPE_INNER
Definition rte_ethdev.h:435
__rte_experimental int rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma, unsigned int num)
uint16_t(* rte_tx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param)
const char * rte_eth_dev_tx_offload_name(uint64_t offload)
rte_eth_hash_function
Definition rte_ethdev.h:451
@ RTE_ETH_HASH_FUNCTION_DEFAULT
Definition rte_ethdev.h:453
@ RTE_ETH_HASH_FUNCTION_SYMMETRIC_TOEPLITZ_SORT
Definition rte_ethdev.h:468
@ RTE_ETH_HASH_FUNCTION_SIMPLE_XOR
Definition rte_ethdev.h:455
@ RTE_ETH_HASH_FUNCTION_SYMMETRIC_TOEPLITZ
Definition rte_ethdev.h:461
@ RTE_ETH_HASH_FUNCTION_TOEPLITZ
Definition rte_ethdev.h:454
uint16_t rte_eth_dev_count_total(void)
#define RTE_ETH_XSTATS_NAME_SIZE
int rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
int rte_eth_stats_reset(uint16_t port_id)
int rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id, uint8_t stat_idx)
static int rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
__rte_experimental int rte_eth_cman_config_set(uint16_t port_id, const struct rte_eth_cman_config *config)
rte_eth_nb_tcs
Definition rte_ethdev.h:897
@ RTE_ETH_4_TCS
Definition rte_ethdev.h:898
@ RTE_ETH_8_TCS
Definition rte_ethdev.h:899
__rte_experimental int rte_eth_cman_config_init(uint16_t port_id, struct rte_eth_cman_config *config)
__rte_experimental int rte_eth_representor_info_get(uint16_t port_id, struct rte_eth_representor_info *info)
int rte_eth_dev_start(uint16_t port_id)
__rte_experimental int rte_eth_fec_get_capability(uint16_t port_id, struct rte_eth_fec_capa *speed_fec_capa, unsigned int num)
char info[RTE_ETH_BURST_MODE_INFO_SIZE]
uint8_t rsvd_mode_params[4]
enum rte_eth_cman_obj obj
struct rte_cman_red_params red
uint8_t rsvd_obj_params[4]
enum rte_cman_mode mode
uint64_t modes_supported
uint64_t objs_supported
struct rte_eth_intr_conf intr_conf
struct rte_eth_txmode txmode
struct rte_eth_rxmode rxmode
uint32_t lpbk_mode
uint32_t dcb_capability_en
struct rte_eth_conf::@122 rx_adv_conf
union rte_eth_conf::@123 tx_adv_conf
uint32_t link_speeds
uint8_t tc_bws[RTE_ETH_DCB_NUM_TCS]
uint8_t prio_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES]
struct rte_eth_dcb_tc_queue_mapping tc_queue
struct rte_eth_dcb_tc_queue_mapping::@124 tc_rxq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS]
struct rte_eth_dcb_tc_queue_mapping::@125 tc_txq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS]
uint16_t nb_mtu_seg_max
uint16_t nb_seg_max
uint32_t max_rx_bufsize
uint32_t max_hash_mac_addrs
struct rte_eth_desc_lim rx_desc_lim
unsigned int if_index
uint16_t max_rx_queues
uint16_t vmdq_queue_num
uint32_t min_rx_bufsize
uint16_t max_tx_queues
struct rte_eth_txconf default_txconf
uint16_t max_vmdq_pools
struct rte_device * device
struct rte_eth_rxconf default_rxconf
uint16_t nb_tx_queues
enum rte_eth_err_handle_mode err_handle_mode
uint32_t max_rx_pktlen
uint32_t max_lro_pkt_size
uint16_t vmdq_queue_base
void * reserved_ptrs[2]
uint64_t reserved_64s[2]
uint64_t tx_queue_offload_capa
uint16_t vmdq_pool_base
struct rte_eth_desc_lim tx_desc_lim
uint64_t flow_type_rss_offloads
uint16_t max_rx_mempools
struct rte_eth_dev_portconf default_txportconf
uint64_t tx_offload_capa
const char * driver_name
uint8_t hash_key_size
uint32_t speed_capa
struct rte_eth_dev_portconf default_rxportconf
struct rte_eth_switch_info switch_info
struct rte_eth_rxseg_capa rx_seg_capa
uint64_t rx_queue_offload_capa
uint64_t rx_offload_capa
uint16_t nb_rx_queues
uint32_t max_mac_addrs
const uint32_t * dev_flags
struct rte_mbuf * pkts[]
enum rte_eth_event_ipsec_subtype subtype
enum rte_eth_event_macsec_type type
enum rte_eth_event_macsec_subtype subtype
uint32_t low_water
uint16_t send_xon
enum rte_eth_fc_mode mode
uint32_t high_water
uint16_t pause_time
uint8_t mac_ctrl_frame_fwd
struct rte_eth_hairpin_queue_cap tx_cap
struct rte_eth_hairpin_queue_cap rx_cap
uint32_t use_locked_device_memory
struct rte_eth_fc_conf fc
enum rte_eth_fc_mode mode
enum rte_eth_fc_mode mode_capa
struct rte_mempool * mp
struct rte_mbuf ** mbuf_ring
struct rte_eth_representor_range ranges[]
enum rte_eth_representor_type type
char name[RTE_DEV_NAME_MAX_LEN]
uint8_t * rss_key
Definition rte_ethdev.h:492
uint8_t rss_key_len
Definition rte_ethdev.h:493
enum rte_eth_hash_function algorithm
Definition rte_ethdev.h:499
uint16_t reta[RTE_ETH_RETA_GROUP_SIZE]
Definition rte_ethdev.h:890
struct rte_eth_thresh rx_thresh
uint64_t offloads
void * reserved_ptrs[2]
uint64_t reserved_64s[2]
uint8_t rx_deferred_start
uint16_t share_group
uint8_t rx_drop_en
uint16_t share_qid
union rte_eth_rxseg * rx_seg
struct rte_mempool ** rx_mempools
uint16_t rx_nseg
uint16_t rx_free_thresh
uint32_t max_lro_pkt_size
Definition rte_ethdev.h:417
uint64_t offloads
Definition rte_ethdev.h:423
void * reserved_ptrs[2]
Definition rte_ethdev.h:426
uint64_t reserved_64s[2]
Definition rte_ethdev.h:425
enum rte_eth_rx_mq_mode mq_mode
Definition rte_ethdev.h:414
struct rte_eth_rxconf conf
struct rte_mempool * mp
uint16_t rx_buf_size
__extension__ uint32_t multi_pools
uint32_t offset_allowed
uint32_t offset_align_log2
struct rte_mempool * mp
uint64_t imissed
Definition rte_ethdev.h:270
uint64_t obytes
Definition rte_ethdev.h:265
uint64_t opackets
Definition rte_ethdev.h:263
uint64_t rx_nombuf
Definition rte_ethdev.h:273
uint64_t ibytes
Definition rte_ethdev.h:264
uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition rte_ethdev.h:280
uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition rte_ethdev.h:278
uint64_t ierrors
Definition rte_ethdev.h:271
uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition rte_ethdev.h:284
uint64_t ipackets
Definition rte_ethdev.h:262
uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition rte_ethdev.h:276
uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition rte_ethdev.h:282
uint64_t oerrors
Definition rte_ethdev.h:272
const char * name
uint8_t hthresh
Definition rte_ethdev.h:360
uint8_t pthresh
Definition rte_ethdev.h:359
uint8_t wthresh
Definition rte_ethdev.h:361
uint8_t tx_deferred_start
uint64_t offloads
void * reserved_ptrs[2]
uint64_t reserved_64s[2]
struct rte_eth_thresh tx_thresh
uint16_t tx_rs_thresh
uint16_t tx_free_thresh
uint64_t offloads
__extension__ uint8_t hw_vlan_insert_pvid
void * reserved_ptrs[2]
__extension__ uint8_t hw_vlan_reject_tagged
uint64_t reserved_64s[2]
__extension__ uint8_t hw_vlan_reject_untagged
enum rte_eth_tx_mq_mode mq_mode
Definition rte_ethdev.h:995
struct rte_eth_txconf conf
enum rte_eth_nb_pools nb_queue_pools
Definition rte_ethdev.h:948
struct rte_eth_vmdq_dcb_conf::@118 pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS]
uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES]
Definition rte_ethdev.h:957
enum rte_eth_nb_pools nb_queue_pools
Definition rte_ethdev.h:979
uint8_t enable_default_pool
Definition rte_ethdev.h:980
struct rte_eth_vmdq_rx_conf::@119 pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS]
char name[RTE_ETH_XSTATS_NAME_SIZE]
uint64_t value